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Logic gates and truth tables

At a Glance

Why This Chapter Matters

Logic circuit questions test Boolean algebra and gate-level circuit construction. The 2014 question (10 marks) asks for the circuit for a sum-of-products expression using only AND and OR gates — a direct realisation with no simplification needed. The 2022 question (15 marks) involves a more complex expression with NOT and asks for both the circuit and the truth table; critically, the expression simplifies dramatically (to x+yx+y), and spotting that simplification earns the full 15 marks efficiently. Both questions are among the fastest in the paper once you know the procedure.

Minimum Theory

Gate types. AND gate: output 1 iff all inputs are 1. OR gate: output 1 iff at least one input is 1. NOT gate (inverter): output is the complement xˉ\bar x.

Sum-of-products (SOP) realisation. Any Boolean expression in disjunctive normal form (DNF) — a sum of product terms — is directly realised by one AND gate per product term and one OR gate combining all products. No simplification is needed unless specifically asked.

Hierarchy of evaluation. Parentheses first, then NOT, then AND, then OR. For f=[x(yˉ+z)]+yf=[x(\bar y+z)]+y: evaluate yˉ\bar y, then yˉ+z\bar y+z, then x(yˉ+z)x(\bar y+z), then add yy.

Key Boolean identities. xyˉ+y=x+yx\bar y+y=x+y (absorption–consensus): xyˉ+y=(x+y)(yˉ+y)=(x+y)1=x+yx\bar y+y=(x+y)(\bar y+y)=(x+y)\cdot 1=x+y. Also x+xy=xx+xy=x (absorption); 1+x=11+x=1.

Logic gate circuit: AND, OR, NOT symbols

Question Archetypes

ArchetypeRecognition
logic-circuit”Construct a logic circuit for [Boolean expression]; write its truth table”

logic-circuit (2 question(s); 2014, 2022)

Recognition Cues

Solution Template

  1. Identify the expression’s structure. Draw the operator hierarchy (precedence: NOT > AND > OR).
  2. Design the circuit layer by layer. First layer: NOT gates for any complements. Second layer: AND gates for product terms. Third layer: OR gates for sums.
  3. List components. Count gates and state inputs/outputs.
  4. Write the truth table. For nn variables, enumerate all 2n2^n rows. Fill intermediate columns (one per gate output), then the final output column.
  5. Check for simplification using Boolean identities. State the simplified expression if it exists.

Worked Example

2014 Paper 2, 2014-P2-Q5d (10 marks)

Use only AND and OR logic gates to construct a logic circuit for the Boolean expression z=xy+uvz=xy+uv.

Structure. z=xy+uvz=xy+uv is already in sum-of-products form: two AND terms combined by OR. No complements needed.

Circuit.

Total: 2 AND + 1 OR = 3 gates.

Truth table (selected rows; full table has 16 rows):

xxyyuuvvxyxyuvuvz=xy+uvz=xy+uv
0000000
0011011
1100101
1111111
0110000

z=xy+uv — 2 AND gates into 1 OR gate\boxed{z=xy+uv \text{ — 2 AND gates into 1 OR gate}}


2022 Paper 2, 2022-P2-Q6b (15 marks)

Find a combinatorial circuit for f(x,y,z)=[x(yˉ+z)]+yf(x,y,z)=[x\cdot(\bar y+z)]+y and write its input/output table.

Operator hierarchy.

  1. NOT gate: yyˉy\to\bar y.
  2. OR gate: yˉ,zyˉ+z\bar y,z\to\bar y+z.
  3. AND gate: x,(yˉ+z)x(yˉ+z)x,(\bar y+z)\to x(\bar y+z).
  4. OR gate: x(yˉ+z),yfx(\bar y+z),y\to f.

Components: 1 NOT + 2 OR + 1 AND = 4 gates.

Truth table:

xxyyzzyˉ\bar yyˉ+z\bar y+zx(yˉ+z)x(\bar y+z)ff
0001100
0011100
0100001
0110101
1001111
1011111
1100001
1110111

Simplification. f=x(yˉ+z)+y=xyˉ+xz+yf=x(\bar y+z)+y=x\bar y+xz+y. Since xyˉ+y=x+yx\bar y+y=x+y (key identity): f=(x+y)+xz=x(1+z)+y=x+yf=(x+y)+xz=x(1+z)+y=x+y.

f(x,y,z)=x+y (simplified — z is irrelevant)\boxed{f(x,y,z)=x+y \text{ (simplified — }z\text{ is irrelevant)}}

The simplified circuit needs only 1 OR gate. The truth table confirms: f=0f=0 only when x=0x=0 and y=0y=0.

Common Traps

Marks-Aware Writing

A 10-mark answer must show: the circuit described (gate types, inputs, outputs) and a truth table with intermediate columns. A 15-mark answer must additionally show: the operator hierarchy of the expression, the full truth table for all 2n2^n input combinations, and the Boolean simplification with algebraic steps.

Practice Set

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